This invention relates to an expandable modular control system employing a universal microprocessor module comprising a microprocessor device having an improved input/output structure.
Reference may be made to the following U.S. Pat. Nos. 3,559,187; 3,725,864; 3,665,404; 3,573,741; 3,564,502; 3,544,966; 3,544,965; 3,514,758; 3,570,542; 3,413,612; and 3,372,378.
With the introduction of LSI/MOS microprocessor devices employing primarily software, i.e., programming in their data processing operations, a new generation of versatile electronic data processing (EDP) systems which can be adapted to a wide variety of control system applications through substitution of new control programs has been developed. One such system is described in the copending U.S. patent application Ser. No. 474,570 of J. Valassis, J. Holden, and M. Mehta assigned to the assignee of the present invention. Although the resulting flexibility afforded the control system enables it to meet the requirements of a wide range of different control system applications, its use is limited somewhat by its memory capacity and the number of input/output devices with which it can interface, characteristics which for the most part are determined at manufacture.
For example, the instruction set of a typical microprocessor device provides for data transfer between the microprocessor and up to 32 peripheral devices. Eight of the input/output (I/O) addresses are assigned to input (INP) date to the system while 24 of the I/O addresses are utilized to output (OUT) data.
There are no specific instructions, however, which allow mode selection and testing of the corresponding input/output (I/O) devices. For example, it may be desirable to have the capability of selecting one of several modes of operation for a particular I/O device as well as the capability to test the status or condition of the various I/O devices under program control.
One method of accomplishing this has been to assign additional I/O addresses dedicated to the mode selection and testing functions to each I/O device. To illustrate, a Teletype would require one OUT address assigned to mode selection, e.g., receive only, receive and echo,, output, etc., and INP address for device testing, e.g., device Ready, in addition to the INP and OUT data device addresses. Thus, a Teletype would require the exclusive use of four of the available I/O addresses. Of course, since the microprocessor has only limited I/O address capability, this method further reduces the number of I/O devices which can be utilized.